Controlling Interrupt Distribution

Controlling Interrupt Distribution

In normal operations, CPUs receive frequent interrupts:

I/O interrupts are "sprayed" to different CPUs to equalize workload.
A scheduling clock causes an interrupt to every CPU every time-slice interval of 10 milliseconds.
Whenever interval timers are in use ("Timers and Clocks"), a CPU handling timers receives frequent timer interrupts.
When the map of virtual to physical memory changes, a TLB interrupt is broadcast to all CPUs.

These interrupts can make the execution time of a process unpredictable. However, you can designate one or more CPUs for real-time use, and keep interrupts of these kinds away from those CPUs. The system calls for interrupt control are discussed at more length under "Minimizing Overhead Work". The REACT/Pro Frame Scheduler also takes care of interrupt isolation.